{"year":2015,"main_file_link":[{"url":"https://ieeexplore.ieee.org/document/7309202"}],"page":"1 - 8","language":[{"iso":"eng"}],"department":[{"_id":"DEP6020"}],"type":"conference","status":"public","title":"FPGA-based hardware-in-the-loop simulation of a rectifier with power factor correction","_id":"4016","date_created":"2020-11-23T14:28:39Z","date_updated":"2023-03-15T13:49:50Z","publisher":"IEEE","author":[{"id":"59764","full_name":"Kiffe, Axel","first_name":"Axel","last_name":"Kiffe"},{"full_name":"Schulte, Thomas","id":"46242","last_name":"Schulte","first_name":"Thomas"}],"conference":{"start_date":"2015-09-08","location":"Geneva, Switzerland","name":"17th European Conference on Power Electronics and Applications (EPE'15 ECCE-Europe)","end_date":"2015-09-10"},"user_id":"74004","abstract":[{"text":"Power electronic devices are growing in importance in automotive applications. Power converters are used in hybrid electric vehicles but also in other vehicle applications like electric steering systems for example. For testing electronic equipment, hardware-in-the-loop simulation is a today's standard method in the automotive industry. Hardware-in-the-loop simulation requires a real-time capable model of the plant but the development of those models of power electronic circuits is still an ambitious task due to the switching of the semiconductors devices. In this contribution, a FPGA-based hardware-in-the-loop simulation of a rectifier with power factor correction will be presented. First a short introduction on modelling methods for real-time simulation of power electronics and the rectifier with power factor correction is given. Furthermore, the modeling of the rectifier and the power factor correction stage and the simulation algorithm are described. Finally, the implementation of the hardware-in-the-loop simulation and measurement results from the real plant are presented and compared to the simulation results.","lang":"eng"}],"citation":{"van":"Kiffe A, Schulte T. FPGA-based hardware-in-the-loop simulation of a rectifier with power factor correction. In IEEE; 2015. p. 1–8.","chicago":"Kiffe, Axel, and Thomas Schulte. “FPGA-Based Hardware-in-the-Loop Simulation of a Rectifier with Power Factor Correction,” 1–8. IEEE, 2015.","din1505-2-1":"<span style=\"font-variant:small-caps;\">Kiffe, Axel</span> ; <span style=\"font-variant:small-caps;\">Schulte, Thomas</span>: FPGA-based hardware-in-the-loop simulation of a rectifier with power factor correction. In:  : IEEE, 2015, S. 1–8","ama":"Kiffe A, Schulte T. FPGA-based hardware-in-the-loop simulation of a rectifier with power factor correction. In: IEEE; 2015:1-8.","ieee":"A. Kiffe and T. Schulte, “FPGA-based hardware-in-the-loop simulation of a rectifier with power factor correction,” presented at the 17th European Conference on Power Electronics and Applications (EPE’15 ECCE-Europe), Geneva, Switzerland, 2015, pp. 1–8.","bjps":"<b>Kiffe A and Schulte T</b> (2015) FPGA-Based Hardware-in-the-Loop Simulation of a Rectifier with Power Factor Correction. IEEE, pp. 1–8.","mla":"Kiffe, Axel, and Thomas Schulte. <i>FPGA-Based Hardware-in-the-Loop Simulation of a Rectifier with Power Factor Correction</i>. IEEE, 2015, pp. 1–8.","ufg":"<b>Kiffe, Axel/Schulte, Thomas (2015)</b>: FPGA-based hardware-in-the-loop simulation of a rectifier with power factor correction, in: , S. 1–8.","short":"A. Kiffe, T. Schulte, in: IEEE, 2015, pp. 1–8.","chicago-de":"Kiffe, Axel und Thomas Schulte. 2015. FPGA-based hardware-in-the-loop simulation of a rectifier with power factor correction. In: , 1–8. IEEE.","apa":"Kiffe, A., &#38; Schulte, T. (2015). FPGA-based hardware-in-the-loop simulation of a rectifier with power factor correction (pp. 1–8). Presented at the 17th European Conference on Power Electronics and Applications (EPE’15 ECCE-Europe), Geneva, Switzerland: IEEE.","havard":"A. Kiffe, T. Schulte, FPGA-based hardware-in-the-loop simulation of a rectifier with power factor correction, in: IEEE, 2015: pp. 1–8."}}