{"year":2013,"place":"Samos, Greece","date_created":"2021-01-28T11:28:21Z","author":[{"full_name":"Flatt, Holger","first_name":"Holger","last_name":"Flatt","id":"58494"},{"id":"1899","full_name":"Jasperneite, Jürgen","first_name":"Jürgen","last_name":"Jasperneite"},{"full_name":"Dennstedt, Daniel","last_name":"Dennstedt","first_name":"Daniel"},{"last_name":"Hung ","first_name":"Tran Dinh","full_name":"Hung , Tran Dinh"}],"_id":"4653","status":"public","citation":{"din1505-2-1":"Flatt, Holger ; Jasperneite, Jürgen ; Dennstedt, Daniel ; Hung , Tran Dinh: Mapping of PRP/HSR Redundancy Protocols onto a Configurable FPGA/CPU Based Architecture. In: IEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XIII), accepted for publication. Samos, Greece, 2013","short":"H. Flatt, J. Jasperneite, D. Dennstedt, T.D. Hung , in: IEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XIII), Accepted for Publication, Samos, Greece, 2013.","havard":"H. Flatt, J. Jasperneite, D. Dennstedt, T.D. Hung , Mapping of PRP/HSR Redundancy Protocols onto a Configurable FPGA/CPU Based Architecture, in: IEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XIII), Accepted for Publication, Samos, Greece, 2013.","chicago":"Flatt, Holger, Jürgen Jasperneite, Daniel Dennstedt, and Tran Dinh Hung . “Mapping of PRP/HSR Redundancy Protocols onto a Configurable FPGA/CPU Based Architecture.” In IEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XIII), Accepted for Publication. Samos, Greece, 2013.","ama":"Flatt H, Jasperneite J, Dennstedt D, Hung TD. Mapping of PRP/HSR Redundancy Protocols onto a Configurable FPGA/CPU Based Architecture. In: IEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XIII), Accepted for Publication. Samos, Greece; 2013.","chicago-de":"Flatt, Holger, Jürgen Jasperneite, Daniel Dennstedt und Tran Dinh Hung . 2013. Mapping of PRP/HSR Redundancy Protocols onto a Configurable FPGA/CPU Based Architecture. In: IEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XIII), accepted for publication. Samos, Greece.","mla":"Flatt, Holger, et al. “Mapping of PRP/HSR Redundancy Protocols onto a Configurable FPGA/CPU Based Architecture.” IEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XIII), Accepted for Publication, 2013.","ufg":"Flatt, Holger et. al. (2013): Mapping of PRP/HSR Redundancy Protocols onto a Configurable FPGA/CPU Based Architecture, in: IEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XIII), accepted for publication, Samos, Greece.","bjps":"Flatt H et al. (2013) Mapping of PRP/HSR Redundancy Protocols onto a Configurable FPGA/CPU Based Architecture. IEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XIII), Accepted for Publication. Samos, Greece.","apa":"Flatt, H., Jasperneite, J., Dennstedt, D., & Hung , T. D. (2013). Mapping of PRP/HSR Redundancy Protocols onto a Configurable FPGA/CPU Based Architecture. In IEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XIII), accepted for publication. Samos, Greece.","van":"Flatt H, Jasperneite J, Dennstedt D, Hung TD. Mapping of PRP/HSR Redundancy Protocols onto a Configurable FPGA/CPU Based Architecture. In: IEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XIII), accepted for publication. Samos, Greece; 2013.","ieee":"H. Flatt, J. Jasperneite, D. Dennstedt, and T. D. Hung , “Mapping of PRP/HSR Redundancy Protocols onto a Configurable FPGA/CPU Based Architecture,” in IEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XIII), accepted for publication, 2013."},"department":[{"_id":"DEP5023"},{"_id":"DEP5019"}],"title":"Mapping of PRP/HSR Redundancy Protocols onto a Configurable FPGA/CPU Based Architecture","language":[{"iso":"eng"}],"abstract":[{"lang":"eng","text":"lt;noscriptgt;lt;/noscriptgt;lt;noscriptgt;lt;/noscriptgt;"}],"date_updated":"2023-03-15T13:49:54Z","publication":"IEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XIII), accepted for publication","type":"conference","user_id":"74222"}