{"date_updated":"2023-03-15T13:49:54Z","date_created":"2021-01-28T11:28:21Z","user_id":"74222","department":[{"_id":"DEP5023"},{"_id":"DEP5019"}],"publication":"IEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XIII), accepted for publication","author":[{"id":"58494","first_name":"Holger","full_name":"Flatt, Holger","last_name":"Flatt"},{"first_name":"Jürgen","id":"1899","full_name":"Jasperneite, Jürgen","last_name":"Jasperneite"},{"first_name":"Daniel","full_name":"Dennstedt, Daniel","last_name":"Dennstedt"},{"first_name":"Tran Dinh","last_name":"Hung ","full_name":"Hung , Tran Dinh"}],"language":[{"iso":"eng"}],"status":"public","_id":"4653","abstract":[{"text":"lt;noscriptgt;lt;/noscriptgt;lt;noscriptgt;lt;/noscriptgt;","lang":"eng"}],"year":2013,"type":"conference","title":"Mapping of PRP/HSR Redundancy Protocols onto a Configurable FPGA/CPU Based Architecture","place":"Samos, Greece","citation":{"chicago-de":"Flatt, Holger, Jürgen Jasperneite, Daniel Dennstedt und Tran Dinh Hung . 2013. Mapping of PRP/HSR Redundancy Protocols onto a Configurable FPGA/CPU Based Architecture. In: IEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XIII), accepted for publication. Samos, Greece.","ufg":"Flatt, Holger et. al. (2013): Mapping of PRP/HSR Redundancy Protocols onto a Configurable FPGA/CPU Based Architecture, in: IEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XIII), accepted for publication, Samos, Greece.","short":"H. Flatt, J. Jasperneite, D. Dennstedt, T.D. Hung , in: IEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XIII), Accepted for Publication, Samos, Greece, 2013.","chicago":"Flatt, Holger, Jürgen Jasperneite, Daniel Dennstedt, and Tran Dinh Hung . “Mapping of PRP/HSR Redundancy Protocols onto a Configurable FPGA/CPU Based Architecture.” In IEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XIII), Accepted for Publication. Samos, Greece, 2013.","mla":"Flatt, Holger, et al. “Mapping of PRP/HSR Redundancy Protocols onto a Configurable FPGA/CPU Based Architecture.” IEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XIII), Accepted for Publication, 2013.","havard":"H. Flatt, J. Jasperneite, D. Dennstedt, T.D. Hung , Mapping of PRP/HSR Redundancy Protocols onto a Configurable FPGA/CPU Based Architecture, in: IEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XIII), Accepted for Publication, Samos, Greece, 2013.","van":"Flatt H, Jasperneite J, Dennstedt D, Hung TD. Mapping of PRP/HSR Redundancy Protocols onto a Configurable FPGA/CPU Based Architecture. In: IEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XIII), accepted for publication. Samos, Greece; 2013.","bjps":"Flatt H et al. (2013) Mapping of PRP/HSR Redundancy Protocols onto a Configurable FPGA/CPU Based Architecture. IEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XIII), Accepted for Publication. Samos, Greece.","din1505-2-1":"Flatt, Holger ; Jasperneite, Jürgen ; Dennstedt, Daniel ; Hung , Tran Dinh: Mapping of PRP/HSR Redundancy Protocols onto a Configurable FPGA/CPU Based Architecture. In: IEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XIII), accepted for publication. Samos, Greece, 2013","apa":"Flatt, H., Jasperneite, J., Dennstedt, D., & Hung , T. D. (2013). Mapping of PRP/HSR Redundancy Protocols onto a Configurable FPGA/CPU Based Architecture. In IEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XIII), accepted for publication. Samos, Greece.","ama":"Flatt H, Jasperneite J, Dennstedt D, Hung TD. Mapping of PRP/HSR Redundancy Protocols onto a Configurable FPGA/CPU Based Architecture. In: IEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XIII), Accepted for Publication. Samos, Greece; 2013.","ieee":"H. Flatt, J. Jasperneite, D. Dennstedt, and T. D. Hung , “Mapping of PRP/HSR Redundancy Protocols onto a Configurable FPGA/CPU Based Architecture,” in IEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XIII), accepted for publication, 2013."}}